For many computer applications, such as for example watching movies, playing games, and exploring the Internet, some reasonable level of computer reliability is expected by the end users. However, few home computing enthusiasts expect or require computers that are fully operationally substantially all of the time. This follows because neither the user's needs nor the data or applications in question relate to critical services or transactions. Conversely, if a computer server is used to maintain a nuclear reactor, record financial transactions or store patient medical records, then year round availability is a requirement and not just a performance aspiration. Specialized computer processors, modules, software, and methods are used to achieve extended periods of computer availability that are required by these specialized applications. The systems that use these specialized components to provide enhanced computational availability are generally referred to as fault tolerant systems.
Fault tolerant systems support computer designs that require only a few minutes of downtime a year. Achieving extended computing uptime often requires redundant computing systems with multiple processors, specialized interconnects, and various monitoring and control modules. In particular, one approach to fault tolerant system design uses two or more processors operating in lock step synchronicity. In these lock step systems, the processors perform substantially the same operations and provide substantially the same output data at substantially the same time. Accordingly, if one of the processor fails, a particular transaction or mathematical operation is still in process within the other processor as a result of the dual processing paths. This processing redundancy is advantageous, but not without additional costs and considerations.
Specifically, if the two processors cease to operate in lock step, many, if not all of the benefits of the fault tolerant system are lost. Therefore, a need exists for methods and device to ensure continued lock step synchronicity and to quickly return a system to lock step synchronism when an out of lock event occurs.